1. Technical Field
The present invention relates to a semiconductor memory device having dummy sense amplifiers and methods of utilizing the same, and more particularly, to a semiconductor memory device having dummy sense amplifiers and a methods of utilizing the same to maximize a refresh margin and a data sensing margin and to repair normal cells.
2. Discussion of Related Art
In general, as semiconductor memory devices become more highly integrated and have increasingly high performance standards, the structure of a cell array including memory cells, bit lines, word lines, sense amplifiers, and the like in the semiconductor memory devices must be continually improved.
For example, in dynamic random access memory (DRAM), several methods for implementing a sense amplifier in the device have been proposed and include an open bit line method, a relax open bit line method, and a folded bit line method.
Because the open bit line method allows memory cells to be laid out at all intersections between bit lines and word lines, the open bit line method may have the advantage of reducing the area of a memory cell portion. However, since the sense amplifiers need to be laid out at every bit line pitch between two cell blocks, it is very difficult to lay out the sense amplifiers.
In the relax open bit line method, memory cells are laid out at all intersections between word lines and bit lines, and one sense amplifier is laid out in two bit line pitches. Therefore, the relax open bit line method may facilitate the laying out of the sense amplifiers, especially compared to the open bit line method.
The folded bit line method further allows memory cells to be laid out at the half of all intersections between word lines and bit lines. However, this may increase the size of the memory cell region and thus the chip size. One sense amplifier is allowed to be laid out in four bit line pitches. Hence, the folded bit line method can provide an easier design, as compared to the open bit line method, and is robust against noise because a bit line pair is formed in one cell block.
Among the sense amplifier implementing methods described above, the open bit line method requires a very strict design dimension of the sense amplifier and does not provide for an easy layout of the sense amplifier even though the memory cell area is small. The folded bit line method can significantly reduce the design dimension of the sense amplifier, but increases the area of the memory cell and the chip size. Accordingly, any of the methods can be selected, where the selection will depend on the implementation purpose or a user request.